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Single-chip Type with Built-in FET Switching Regulator Series
High-efficiency Step-up Switching Regulators with Built-in Power MOSFET
BD8152FVM,BD8158FVM
No.10027EBT20
Description BD8152FVM,BD8158FVM are the 1-channel step-up switching regulator which builds in the low voltage FET. Input voltage is 2.5 V to 5.5 V (BD8152FVM), 2.1V to 5.5V(BD8158FVM) realizing the low consumption power. High accuracy feedback voltage 1% is established and the brightness dispersion of TFT-LCD panel is suppressed. Features 1) Current mode PWM system 2) Input voltage is 2.5 V to 5.5 V (BD8152FVM), 2.1 V to 5.5 V (BD8158FVM, providing the low power input) 3) Switching frequency is variable as 600 kHz/1,200 kHz. 4) Built-in 0.25 power switch 5) Feedback voltage 1.245 1% 6) Built-in under-voltage lockout protection circuit 7) Built-in overcurrent protection circuit 8) Built-in thermal shutdown circuit Applications 7 to 17 inches panels for the satellite navigation system, laptop PC TFT-LCD panels Absolute maximum ratings (Ta = 25) Parameter Power supply voltage Power dissipation Operating temperature range Storage temperature range Switch pin current Switch pin voltage Maximum junction temperature BD8152FVM BD8158FVM
Symbol Vcc Pd Topr Tstg Isw Vsw Tjmax
Limit 7 588* -40 to +85 -40 to +125 -55 to +150 1.5** 15 150
Unit V mW A V
* Reduced by 4.7 mW/ over 25, when mounted on a glass epoxy board (70 mm 70 mm 1.6 mm). ** Must not exceed Pd.
Recommended Operating Ranges (Ta = 25) Parameter Power supply voltage (BD8152FVM) Power supply voltage (BD8158FVM) Switch current Switch pin voltage
*Specified at 600kHz switching operating.
Symbol Vcc Vcc ISW VSW
Limit Min. 2.5 2.1 Typ. 3.3 2.5 Max. 5.5 4.0(5.5)* 1.4 14
Unit V V A V
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1/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Technical Note
Electrical Characteristics BD8152FVM (Unless otherwise specified, Ta = 25; Vcc = 3.3 V; ENB = 3.3 V) Limit Parameter Symbol Unit Conditions Min. Typ. Max. [triangular waveform oscillator] Oscillating frequency 1 FOSC1 540 600 660 kHz FCLK = 0 V Oscillating frequency 2 FOSC2 1.08 1.20 1.32 MHz FCLK = Vcc [Overcurrent protection circuit] Overcurrent limit ISW 2 A [Soft start circuit] SS source current ISO 6 10 14 A Vss = 0.5 V [Under-voltage lockout protection circuit] Off threshold voltage VUTOFF 2.1 2.2 2.3 V On threshold voltage VUTON 2.0 2.1 2.2 V [Error amp] Input bias current IB 0.1 0.5 A Feedback voltage VFB 1.232 1.245 1.258 V Buffer [Output] ON resistance RON 250 380 m *Isw = 1 A Max. duty ratio DMAX 72 80 88 % RL = 100 [ENB] ENB on voltage VON Vcc0.7 Vcc V ENB off voltage VOFF 0 Vcc0.3 V [Overall] Standby current ISTB 0 10 A VENB = 0 V Average consumption current ICC 1.2 2.4 mA no switching
* This product is not designed for protection against radio active rays. Design guarantee (No total shipment inspection is made.)
Electrical Characteristics BD8158FVM (Unless otherwise specified, Ta = 25; Vcc = 2.5 V; ENB = 2.5 V) Limit Parameter Symbol Unit Conditions Min. Typ. Max. [triangular waveform oscillator] Oscillating frequency 1 FOSC1 480 600 720 kHz FCLK = 0 V Oscillating frequency 2 FOSC2 0.96 1.20 1.44 MHz FCLK = Vcc [Overcurrent protection circuit] Overcurrent limit ISW 2 A [Soft start circuit] SS source current ISO 6 10 14 A Vss = 0.5 V [Under-voltage lockout protection circuit] Off threshold voltage VUTOFF 1.7 1.8 1.9 V On threshold voltage VUTON 1.6 1.7 1.8 V [Error amp] Input bias current IB 0.1 0.5 A Feedback voltage VFB 1.232 1.245 1.258 V Buffer [Output] ON resistance RON 250 m *Isw = 1 A Max. duty ratio DMAX 85 % RL = 100 [ENB] ENB on voltage VON Vcc0.7 Vcc V ENB off voltage VOFF 0 Vcc0.3 V [Overall] Standby current ISTB 0 10 A VENB = 0 V Average consumption current ICC 1.2 2.4 mA no switching
* This product is not designed for protection against radio active rays. Design guarantee (No total shipment inspection is made.)
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2/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Reference Data (Unless otherwise specified, Ta = 25)
2.00 STANDBY CURRENT:Icc [uA] SUPPLY CURRENT:Icc [mA] 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 0 1 2 3 4 SUPPLY VOLTAGE:Vcc [V] 2.000 1.500 1.000 0.500 0.000 -0.500 -1.000 -1.500 -2.000 0 1 2 3 4 SUPPLY VOLTAGE:Vcc [V] REFERENCE VOLTAGE:VREF[V] 1.260 1.255 1.250 1.245 1.240 1.235 1.230 -40 -15
Technical Note
125C
-40C 25C
25C
-40C
125C
10
35
60
85
110
AMBIENT TEMPERATURE:Ta []
Fig. 1 Total Supply Current
Fig. 2 Standby Current
Fig. 3 Reference Voltage vs Temperature
0
2.0 REFERENCE VOLTAGE:VREF[V 1.8 1.6 1.4
BD8158FVM
2000
SS CURRENT:ISS[uA]
-4
VFCLK=VCC
1500
-8
1.0 0.8 0.6 0.4 0.2 0.0
ICOMP[uA]
1.2
1000
-12
VFCLK=GND
500
-16
-20
0
0.5
1
1.5
2
0
0
2 SUPPLY VOLTAGE:VCC[V]
4
-40
-15
10
35
60
85
110
SS VOLTAGE:VSS[V]
VCOMP[V]
Fig. 4 SS Source Current
Fig. 5 Reference Voltage vs Power Supply Voltage
Fig. 6 Switching Frequency Temperature
20
20
100
FCLK CURRENT:IFCLK[uA]
15
125C 25C
ENB CURRENT:IENB[uA]
15
50
125C
10 ICOMP[uA]
10
25C
0
5
-40C
5
-50
-40C
0 0.0
-100
0 0.0
0.5
1.0
1.5
2.0
2.5
3.0
0.5
1.0
1.5
2.0
2.5
3.0
1.0
1.1
1.2
1.3
1.4
1.5
FCLK VOLTAGE:VFCLK[V]
ENB VOLTAGE:VENB[V]
VCOMP[V]
Fig. 7 FCLK Pin Current
Fig. 8 ENB Pin Current
Fig. 9 COMP Sinking vs Source Current
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3/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Reference Data (Unless otherwise specified, Ta = 25)
Technical Note
100
90
95
90
EFFICIENCY [%]
EFFICIENCY [%]
Max Duty [%]
80 VCC = 2.5 V f = 1200 kHz 70 VCC = 2.5 V f = 600 kHz 60
80
90
70
85
60
BD8158FVM
80 -40 -15 10 35 60 85 110
BD8152FVM
0.3
50 0.05 0.15 0.25 0.35 0.45
50 0.05
0.1
0.15
0.2
0.25
AMBIENT TEMPERATURE:Ta []
OUTPUT CURRENT:Io[A]
OUTPUT CURRENT:Io[A]
Fig. 10 Max. Duty Ratio Temperature
Fig. 11 Vcc = 2.5V Power Efficiency
Fig. 12 Vcc = 5V Power Efficiency
100
0.8 MAXIMUM CURRENT:IOMAX[A]
BD8158FVM
0.6 Io = 0 mA Io = 100 mA
90 EFFICIENCY [%]
80
0.4 F = 600 kHz 0.2 F = 1200 kHz 0 2.0 Vo
70
60
20 us
100 mV
BD8158FVM
50 2.0 2.5 3.0 3.5 4.0
2.4
2.8
3.2
3.6
4.0
SUPPLY VOLTAGE:Vcc[V]
SUPPLY VOLTAGE:Vcc[V]
Fig. 13 Power Efficiency vs Power Supply Voltage
Fig. 14 Max. Load Current vs Power Supply Voltage
Fig. 15 Load Response Waveform
9
9 Vcc = 2.5 V
9
OUTPUT VOLTAGE:Vo[V]
OUTPUT VOLTAGE:Vo[V]
8.8
OUTPUT VOLTAGE:Vo[V]
8.8
8.8 Vcc=5V 8.6
8.6
8.6
8.4
8.4
8.4
8.2
8.2
8.2
BD8158FVM
8 2.0 2.5 3.0 3.5 4.0 8 0.0 0.1 LOAD CURRENT:Io[A] 1.0 8 0.0
BD8152FVM
0.1 LOAD CURRENT:Io[A] 1.0
SUPPLY VOLTAGE:Vcc[V]
Fig. 16 Output Voltage Line Regulation
Fig. 17 Output Voltage Load Regulation 1
Fig. 18 Output Voltage Load Regulation 2
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4/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Block Diagram
SS 8 FCLK 7 VCC 6
Technical Note
SW 5
SLOPE
CURRENT SENSE OSC
FCLK
+
SW
SS
Set
SOFT START PWM +-
LOGIC
DRV SDWN
Reset
Vcc
OCP
ERR -+ VREF
UVLO/TSD
COMP
ENB
TOP VIEW
GND
FB
1.245V
1 COMP
2 FB
3 ENB
4 GND
Fig. 19 Pin Arrangement Diagram and Block Diagram
Pin Assignment Diagram and Function Pin No. Pin name 2 3 4 5 6 7 8 FB ENB GND SW Vcc FCLK SS Error amp inversion input pin Control input pin Ground pin
Function
N-channel power FET drain output Power supply input pin Frequency switching pin Soft start current output pin
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5/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Description of Operation of Each Block
L1 10uH D1 RB161M-20
Technical Note
VOUT 9V
VCC
C0 10uF
C1 10uF
8 SS
7 FCLK VCC
6 SW
5
C2 0.01uF
SLOPE
OSC
CURRENT SENSE
+ SOFT START PWM +Set Reset LOGIC DRV SDWN
OCP
ERR -+ VREF
UVLO/TSD
1.245V
COMP 1
FB
2
ENB
3
GND
4
C4 100pF
R3 5.1k
R1 110k
C3
3300pF
R2 18k
Fig. 20 Application Circuit Diagram Example Error amp (ERR) This is the circuit to compare the reference voltage 1.245 V (Typ.) and the feedback voltage of output voltage. Switching duty is decided by the COMP pin voltage which is the comparison result. At the time of start, since the soft start is operated by the SS pin voltage, the COMP pin voltage is limited to the SS pin voltage. Oscillator (OSC) This block generates the oscillating frequency. It is possible to select 600 kHz/1.2 MHz (Typ.) by the FCLK pin. SLOPE This block generates the triangular waveform from the clock generated by OSC. Generated triangular waveform is sent to the PWM comparator. PWM Output COMP voltage of the error amp and the triangular waveform of the SLOPE block are compared to decide the switching duty. Since the switching duty is limited by the maximum duty ratio which is decided internally, it does not become 100%. Reference voltage (VREF) This block generates the internal reference voltage of 1.245 V (Typ.). Protection circuit (UVLO/TSD) UVLO (under-voltage lockout protection circuit) shuts down the circuits when the voltage is 2.2 V (TYP.BD8152FVM),1.8 V (TYP.BD8158FVM) or lower. Thermal shutdown circuit shuts down IC at 175 (Typ.) and recovers at 160 (Typ.). Overcurrent protection circuit (OCP) Current flowing to the power FET is detected by voltage at the CURRENT SENSE and the overcurrent protection operates at 3 A (Typ.). When the overcurrent protection operates, switching is turned off and the SS pin capacity is discharged. Soft start circuit Since the output voltage rises gradually while restricting the current at the time of startup, it is possible to prevent the output voltage overshoot or the inrush current.
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6/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Timing Chart Startup sequence
Technical Note
VCC
ENB
SS
SW
VO
Fig. 21 Startup Sequence Waveform
Overcurrent protection operating
2.5V
VCC,ENB
SS
SW
VO
IO
Fig. 22 Overcurrent Protection Operating Waveform
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7/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Technical Note
Selecting Application Components (1) Setting the output L constant The coil L to use for output is decided by the rating current ILR and input current maximum value IINMAX of the coil.
IL
IINMAX + IL should not reach the rating value level
L
VCC IL Vo
ILR
IINMAX average current
Co
t
Fig. 23 Coil current waveform Fig. 24 Output Application Circuit Diagram
Adjust so that IINMAX + IL does not reach the rating current value ILR. At this time, IL can be obtained by the following equation. 1 Vo - Vcc 1 [A] Where, f is the switching frequency. IL= Vcc L Vo f Set with sufficient margin because the coil L value may have the dispersion of approx. 30%. If the coil current exceeds the rating current ILR of the coil, it may damage the IC internal element. BD8152FVM,BD8158FVM use the current mode DC/DC converter control and has the optimized design at the coil value. The following coil values are recommended from the aspects of power efficiency, response and safety. When the coil out of this range is selected, the stable continual operation is not guaranteed such as the switching waveform becomes irregular. Please pay attention to it. Switching frequency: L = 10 uH to 22 uH at 600 kHz Switching frequency: L = 4.7 uH to 15 uH at 1,200 kHz (2) Setting the output capacitor For the capacitor C to use for the output, select the capacitor which has the larger value in the ripple voltage VPP allowance value and the drop voltage allowance value at the time of sudden load change. Output ripple voltage is decided by the following equation. VPP = ILMAX RESR + 1 fCo Vcc Vo (ILMAX IL 2 ) [V] Where, f is the switching frequency.
Perform setting so that the voltage is within the allowable ripple voltage range. For the drop voltage during sudden load change; VDR, please perform the rough calculation by the following equation. VDR = I Co 10u sec [V]
However, 10 s is the rough calculation value of the DC/DC response speed. Please set the capacitance considering the sufficient margin so that these two values are within the standard value range. (3) Selecting the input capacitor Since the peak current flows between the input and output at the DC/DC converter, a capacitor is required to install at the input side. For this reason, the low ESR capacitor is recommended as an input capacitor which has the value more than 10F and less than 100 m. If a capacitor out of this range is selected, the excessive ripple voltage is superposed on the input voltage, accordingly it may cause the malfunction of IC. However these conditions may vary according to the load current, input voltage, output voltage, inductance and switching frequency. Be sure to perform the margin check using the actual product.
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8/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Technical Note
(4) Selecting the output rectification diode Schottky barrier diode is recommended as the rectification diode to use at the DC/DC converter output stage. Select the diode paying attention to the max. inductor current and max. output voltage. < Rating current of diode Max. Inductor current IINMAX + IL Max. output voltage VOMAX < Rating voltage of diode Since each parameter has 30% to 40% of dispersion, be sure to design providing sufficient margins. (5) Design of the feedback resistor constant Refer to the following equation to set the feedback resistor. As the setting range, 10 k to 330 k is recommended. If the resistor is set to 10 k or lower, it causes the reduction of power efficiency. If it is set to 330 k or larger, the offset voltage becomes larger by the input bias current 0.4 A (Typ.) in the internal error amp. Step-up Vo = R8 + R9 R9 1.245 [V]
Vo R8
2
Reference voltage 1.245 V
R9
FB
ERR
Fig. 25 Feedback Resistor Setting (6) Setting the soft start time Soft start is required to prevent the coil current at the time of startup from increasing and the overshoot of the output voltage at the starting time. Fig.26 shows the relation between the capacitance and soft start time. Please refer to it to set the capacitance. As the capacitance, 0.001 F to 0.1 F is recommended. If the capacitance is set to 0.001 F or lower, the overshooting may occur on the output voltage. If the capacitance is set to 0.1 F or larger, the excessive back current flow may occur in the internal parasitic elements when the power is turned off and it may damage IC. When the capacitor to 0.1 F or larger is used, be sure to insert a diode to VCC in series, or a bypass diode between the SS pin and VCC.
Bypass diode
10
DELAY TIME[ms]
1
0.1
0.01 0.001
0.01 SS CAPACITANCE[uF]
0.1
Back current prevention diode
Fig. 26 SS Pin Capacitance vs Delay Time
VCC
Output pin
Fig. 27 Bypass Diode Example When there is the startup relation (sequences) with other power supplies, be sure to use the high accuracy product (such as X5R). Soft start time may vary according to the input voltage, output voltage, loads, coils and output capacity. Be sure to verify the operation using the actual product. (7) Setting the ENB pin When the ENB pin is set to Hi, the internal circuit becomes active and the DC/DC converter starts operating. When it is set to Low, the shut down is activated and all circuits will be turned off. (8) Setting the frequency by FCLK It is possible to change the switching frequency by setting the FCLK pin to Hi or Low. When it is set to Low, the product operates at 600 kHz (Typ.). When it is set to Hi, the product operates at 1,200 kHz (Typ.).
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9/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Technical Note
(9)Setting RC, CC of the phase compensation circuit In the current mode control, since the coil current is controlled, a pole (phase lag) made by the CR filter composed of the output capacitor and load resistor will be created in the low frequency range, and a zero (phase lead) by the output capacitor and ESR of capacitor will be created in the high frequency range. In this case, to cancel the pole of the power amplifier, it is easy to compensate by adding the zero point with CC and RC to the output from the error amp as shown in the illustration. Open loop gain
A fp(Min) fp(Max) Gain dB lOUTMin lOUTMax fz(ESR) 0
fp = fz (ESR) =
1 2 RO CO 1 2 ESR CO
[Hz] [Hz]
0 Phase deg -90
Pole at the power amplification stage When the output current reduces, the load resistance Ro increases and the pole frequency lowers.
fp (Min) = 1 2 ROMax CO 1 2 ROMin CO [Hz] At light-load [Hz] At heavy-load
Error amp phase compensation
A Gain dB 0
fz (Max) =
Phase
0
Zero at the power amplification stage When the output capacitor is set larger, the pole frequency lowers but the zero frequency will not change. (This is because the capacitor ESR becomes 1/2 when the capacitor becomes 2 times.)
fp (Amp.) = 1 2 Rc Cc
deg-90
[Hz]
Fig. 28 Gain vs Phase
L Vo
VCC
Cin COMP Rc Cc
Vcc,PVcc SW
ESR
Ro
Co
GND,PGND
Fig. 29 Application Circuit Diagram It is possible to realize the stable feedback loop by canceling the pole fp (Min.), which is created by the output capacitor and load resistor, with CR zero compensation of the error amp as shown below. fz (Amp.) = fp (Min.) 1 2 Rc Cc = 1 2 Romax Co [Hz]
As the setting range for the resistor, 1 k to 10 k is recommended. When the resistor is set to 1 k or lower, the effect by phase compensation becomes low and it may cause the oscillation of output voltage. When it is set to 10 k or larger, the COMP pin becomes Hi-Z and the switching noise becomes easy to superpose. Therefore the stable switching pulse cannot be generated and the irregular ripple voltage may be generated on the output voltage. As the setting range for the capacitance, 3,300 pF to 10,000 pF is recommended. When the capacitance is set to 3,300 pF or lower, the irregular ripple voltage may be generated on the output voltage due to the effect of switching noise. When it is set to 10,000 pF or larger, the response becomes worse and the output voltage fluctuation becomes large. Accordingly it may require the output capacitor which is larger than the necessary value.
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10/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Technical Note
Application Examples Although ROHM is sure that the application examples are recommendable ones, further check the characteristics of components that require high precision before using them. When a circuit is used modifying the externally connected circuit constant, be sure to decide allowing sufficient margins considering the dispersion of values by external parts as well as our IC including not only the static but also the transient characteristic.For the patent, we have not acquired the sufficient confirmation. Please acknowledge the status. (1) When the charge pump is removed from the DC/DC converter to make it 3-channel output mode: It is possible to create the charge pump by using the switching operation of DC/DC converter. When the application shown in the following diagram is used, 1-channel DC/DC converter output, 1-channel positive side charge pump and 1-channel negative side charge pump can be output as a total of 3-channels.
0.1F D1 RB161M-20 0.1F Vo 9V DAN217U
L1 10H
VCC
C0 10F 1F
8 SS 7 FCLK VCC CU R REN T SENSE 6 SW 5
C1 10F
1F
1k
2SD2657k VGH 1F 100k
0.1F
C2 0.01F
UDZ Series DAN217U
SLOPE + SOFT START
OSC
Set Reset PWM +-
LOGIC
DRV SDWN
1F 1k
2SB1695k VGL 1F
OCP
UDZ Series 100k
ERR -+ VREF
UVLO/TSD
1.245V
COMP 1
FB
2
ENB
3
GND
4
R3 C3
5.1k 3300pF
R1 110k
R2 18k
Fig. 30 3ch Application Circuit Diagram Example
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11/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Technical Note
(2) When the output voltage is set to 0 V: Since the switch does not exist between the input and output in the application using the step-up type DC/DC converter, the output voltage is generated even if the IC is turned off. When it is intended to keep the output voltage 0 V until IC operates, insert the switch as shown in the following circuit diagram.
L1 1k 10uH D1 RB161M-20 Vo
VCC
10uF
C1 10uF
8 SS
7 FCLK VCC
6 SW
5
Switches of PNP or PFET
C2 0.01uF
SLOPE
OSC
CURRENT SENSE
+ SOFT START PWM +Set Reset LOGIC DRV SDWN
OCP
ERR
-+
UVLO/TSD
1.245V
VREF
COMP 1
FB
2
ENB
3
GND
4
R3
5.1k
R1 110k
C3
3300pF
R2 18k
Fig. 31 Switch Application Circuit Diagram Example Application Examples (3) When the circuit is intended to operate at the lower voltage than the IC operating range: Although the recommended operating range of IC starts from 2.5 V / 2.1 V (BD8152FVM,BD8158FVM), it is possible to continue operating by composing the self-energizing type step-up DC/DC converter application even if the input voltage lowered than 2.1 V. This example is recommended for the application with battery input.
L1 10uH D1 RB161M-20 Vo 3.3V
VCC 2.0V C1 10uF
10uF
8 SS
7 FCLK VCC
6 SW
5
C2 0.01uF
SLOPE
OSC
CURRENT SENSE
+ SOFT START PWM +Set Reset LOGIC DRV SDWN
OCP
ERR -+ VREF
UVLO/TSD
1.245V
COMP 1
FB
2
ENB
3
GND 4
R3
5.1k
R1 110k
C3
3300pF
R2 18k
Fig. 32 Self-Energizing Application Circuit Diagram Example
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12/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Technical Note
(4) SEPIC type application When it is intended to compose the step-up type DC/DC converter, the SEPIC type application is recommended. Since the switching voltage is generated by the value of input voltage + output voltage, pay utmost attention to the withstand voltage of SW pin. D1
L1 10uH 4.7uF RB161M-20 Vo VCC 10uH 10uF
C1 10uF
8 SS
7 FCLK VCC
6 SW
5
C2 0.01uF
SLOPE
OSC
CURRENT SENSE
+ SOFT START PWM +Set Reset LOGIC DRV SDWN
OCP
ERR -+ VREF
UVLO/TSD
1.245V
COMP 1
FB
2
ENB
3
GND 4
R3
5.1k
R1 110k
C3
3300pF
R2 18k
Fig. 33 SEPIC Application Circuit Diagram Example (5) When the Supply Voltage is over 4.0 V (BD8158FVM only) The Capacitor C4 is inserted to COMP pin, and it operates when the Supply Voltage is over 4.0 V. In this case, Switching Frequency is limited to 600kHz.
L1 10uH D1 RB161M-20 Vo
10uF
C1 10uF
8 SS
7 FCLK VCC
6 SW
5
C2 0.01uF
SLOPE
OSC
CURRENT SENSE
+ SOFT START PWM +Set Reset LOGIC DRV SDWN
OCP
ERR -+ VREF
UVLO/TSD
1.245V
COMP 1
FB
2
ENB
3
GND 4
C4 100pF
R3
5.1k
R1 110k
C3
3300pF
R2 18k
Fig.34 Circuit Diagram Example(Supply Voltage over 4.0 V )
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13/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
I/O Equivalent Circuit Diagrams 1.COMP 5.SW
Technical Note
Vcc
2.FB
8.SS Vcc Vcc
Vcc
3.ENB 7.FCLK Vcc
130k
Fig. 34 I/O Equivalent Circuit Diagram Notes of Use 1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated. 2) GND potential Ensure a minimum GND pin potential in all operating conditions. 3) Setting of heat Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4) Pin short and mistake fitting Use caution when orienting and positioning the IC for mounting on an application board. Improper mounting may result in damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by the presence of a foreign object may result in damage to the IC. 5) Action in strong magnetic field Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction.
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14/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Technical Note
6) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. 7) Ground wiring patterns When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring patterns of any external components. 8)This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements. For example, when the resistors and transistors are connected to the pins as shown in Fig. 35, a parasitic diode or a transistor operates by inversing the pin voltage and GND voltage. The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements, such as the application of voltages lower than the GND (P substrate) voltage to input and output pins. Resistor
Transistor (NPN)

(Pin A)
B (Pin B)
(Pin B)

C

GND P N (Pin A)
E
B
C E GND Parasitic elements
P N N P
P
N P N Parasitic element N P N P substrate Parasitic elements GND GND P
GND
Parasitic element
Fig.35 Example of a Simple Monolithic IC 9)Overcurrent protection circuits An overcurrent protection circuit designed according to the output current is incorporated for the prevention of IC destruction that may result in the event of load shortning. This protection circuit is effective in preventing damage due to sudden and unexpected accidents. However, the IC should not be used in applications characterized by the continuous operation or transitioning of the protection circuits. At the time of thermal designing, keep in mind that the current capability has negative characteristics to temperatures. 10)Thermal shutdown circuit (TSD) This IC incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within the specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power dissipation limits, the attendant rise in the chip's temperature Tj will trigger the temperature protection circuit to turn off all output power elements. The circuit automatically resets once the chip's temperature Tj drops. Operation of the TSD circuit presumes that the IC's absolute maximum ratings have been exceeded. Application designs should never make use of the TSD circuit. 11)Testing on application boards At the time of inspection of the installation boards, when the capacitor is connected to the pin with low impedance, be sure to discharge electricity per process because it may load stresses to the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC.
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15/17
2010.03 - Rev.B

BD8152FVM, BD8158FVM
Power Dissipation Reduction
Technical Note
POWER DISSIPATION:Pd[mW]
800 600 400 200 BD8152FVM 0 25 50 75 85 BD8158FVM 100 125 150 588 On 70x70x1.6mm Board
AMBIENT TEMPERATURE[]
Fig. 36 Power Dissipation Reduction
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16/17
2010.03 - Rev.B
BD8152FVM, BD8158FVM
Ordering part number
Technical Note
B
D
8
Part No. 8152 8158
1
5
2
F
V
M
-
E
2
Part No.
Package FVM:MSOP8
Packaging and forming specification TR: Embossed tape and reel (MSOP8)
MSOP8

2.90.1 (MAX 3.25 include BURR)
8765
Tape
0.290.15 0.60.2
+6 4 -4
Embossed carrier tape 3000pcs TR
The direction is the 1pin of product is at the upper right when you hold
Quantity Direction of feed
4.00.2
2.80.1
( reel on the left hand and you pull out the tape on the right hand
1pin
)
1 234
1PIN MARK 0.475 S +0.05 0.22 -0.04 0.08 S 0.65
+0.05 0.145 -0.03
0.9MAX 0.750.05
0.080.05
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
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17/17
2010.03 - Rev.B
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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